1. Field of the Invention
This invention is directed to computing system, in general, and to control units for permitting computing systems of different capabilities to interface on a meaningful basis, in particular.
2. Prior Art
There are many known computing systems which utilize the capabilities of different types of units or subsystems. For example, many computing systems use microprocessors for certain portions of their operating repertoire and mini-computers for other portions thereof. The microprocessors and minicomputers frequently have different operating capabilities, such as, but not limited to, data throughput or operating speed. Inasmuch as the devices or system portions have different operating speeds, it is frequently impossible for these devices to exchange information directly. Typically, the system portions must therefore, interface through some intermediate system portion such as a register or the like. However, this arrangement has its own shortcomings.
For example, in the past one method of handling this problem has been to use an ordinary RAM for storing the information or data. A pointer is then used to keep track of the memory location which is being accessed for reading while another pointer is used to keep track of the memory address or location which is being accessed for writing. The difficulty with this operation is that the system effectively stops functioning in that, when the pointer is pointing to the RAM location for writing, the writing operation takes place. However, after the writing operation has taken place, the system must stop and the information stored in the RAM must then be read at the appropriate time in conjunction with the read pointer. Thus, the operation is effectively (1) load the RAM from one side, (2) stop, (3) read the RAM from the other side. The difficulty and the expense in system operating time in this situation is clear. That is, the read and write operations cannot be carried out at the same time.
Another technique which is being used is the so-called "bubble through" pointer technique. In this system, the data is loaded into the RAM at one end, or side, and propagated through the RAM by means of a self-clocking arrangement. The data, after propogation through the RAM, then sits at the output until the data is clocked out. In theory, this system permits data to be loaded in and read out of the memory at the same time (as controlled by the clocking apparatus). However, this technique is notoriously slow. For example, the data has a definite time requirement in propagating from one side of the RAM to the other. Thus, the RAM becomes the pacing or limiting item in the system from a timewise characteristic. Clearly, each of these systems is fraught with shortcomings and frailties wherein it is highly desirable to improve upon this portion of the computing system.